Latest posts tagged with #HiPEAC on Bluesky
Recurring theme of @hipeac.bsky.social this week has been the intersection of compilers and architectures to address challenges in #ai, especially llm. Really exciting when @jocare.bsky.social announced #HiPEAC 2027 will be held in Glasgow!
Our latest article, “Towards energy-conscious and resilient computer architectures” has been published in HiPEACinfo 76, the magazine of the European HiPEAC Network of Excellence. Read more at www.hipeac.net/news/magazin...
#HiPEAC @hipeac.bsky.social
Over the past decade, #MERIC #EnergyEfficiency software suite has become a key tool for datacentre power monitoring & optimisation.
In #HiPEAC Info76, Ondřej Vysocký explains how MERIC boosts #EnergyEfficiency & sustainability in #HPC.
🔗 www.hipeac.net/files/public...
📰 IT4Innovations in #HiPEAC Info!
🔹 Read about our work on @dare-eu.bsky.social SGA1 – next-gen EU processors with RISC-V (p.12)
🔹 See how Bellmer CZ improved simulations with Karolina supercomputer & EuroCC Czechia (p.36)
👉 www.hipeac.net/magazine/717...
#HPC #Supercomputing #RISCV #SMEs
After #HiPEAC in January, I received lots of invitations to present at other events, mostly in the US and Saudi Arabia.
Of course it's a personal matter of what to attend, but I cannot comprehend the absolute ignorance of asking an out-and-visible queer researcher to come to these places right now.
Proud to announce that "Graph of Thoughts", led by Maciej Besta, won a #HiPEAC Technology Transfer Award!
We're humbled and excited about the real-world impact. The technology is already in production with our partners, driving innovation. Huge thanks to everyone involved!
https://buff.ly/3YVqzcJ
🔙 #HiPEAC25 Throwback!
From Jan 20-22 in Barcelona, Alexandra Kourfali spoke at the RISC-V workshop, sharing insights on the EuroHPC JU RISC-V roadmap and the future of European processors & accelerators.
📸 See the highlights below! 👀 #hipeac
CogniGroners Fatih Turkmen, Farhad Merchant, Dirk Pleiter and Georgi Gaydadjiev attended the HiPEAC 2025 conference.
💡 Exciting ideas were exchanged, new connections were made! Interested in collaborating or discussing? Feel free to reach out: rug.nl/cognigron 🤝
#HiPEAC #conference
@fclc.bsky.social talks #tenstorrent at #HiPEAC providing scaling up with a data first architecture based upon #riscv. By making this a fundamental primitive of the architecture they can accelerate both #AI and #HPC
I'm presenting my research into accelerating Number Theoretic Transform operations with Systolic Arrays at #HiPEAC #Barcelona today.
If you're attending the conference, you can find me at the SeHAS workshop, presenting at 16:00 in the Àgora room on the first floor ✌️
Teresa from #BSC kicks off the #RISCV workshop at #HiPEAC , a day of interesting talks ahead and call to get involved and join the #RISCV #HPC SIG
"MLIR allows compiler developers to disagree" Tobias Grosser kicks off the #MLIR workshop at #HiPEAC
Great to be in Barcelona for #hipeac this week, a really great schedule so should be an interesting few days! I am especially looking forward to our #xdsl workshop tomorrow, Monday, morning
The 20th edition of the #HiPEAC conference will take place in Barcelona on 20-22 January 2025
HiPEAC Vision 2025 for the next 10 years will be presented at the conference
A record 740 delegates have registered for the conference
www.hipeac.net/news/7082/hi...
#HPC #AI #HiPEAC25
Don’t miss the workshop “CompContinuum: Computing Continuum of Cloud, Edge, and IoT Technologies” at #HiPEAC 2025.
📌 Barcelona, Spain
📅 22 January 2025
Four EUfunded projects: #AERO, #OpenCUBE, #Vitamin-V, and #RISER.
🔗 Learn more and register: europa.eu/!wR9VRm
Is it possible to build an MRI scanner on your desk? Sure it is! Red Pitaya's Žiga Agostini explains how their credit-card-sized multiple lab instruments are used by researchers at MIT!
Check out the full Red Pitaya interview for HiPEAC at www.youtube.com/watch?v=k5OY...
#electronicsreporter #hipeac
